Verify the test signal
11 Check the clock pulse width. Using the oscilloscope, verify that the clock pulse
width is 3.50 ns, +0 ps or − 100 ps.
aa Enabl e the pulse generator channel 1 and channel 2 outputs.
bb In the oscilloscope Timebase menu, select Delay. Using the oscilloscope knob,
position the clock waveform so that the waveform is centered on the screen.
cc In the oscilloscope Delta V menu, set the Marker 1 Position to Chan 2, then set
Marker 1 at − 1.3000 V. Set Marker 2 Position to Chan 2, then set Marker 2 at
− 1.3000 V.
dd In the oscilloscope Delta T menu, select Start On Pos Edge 1. Select Stop on Neg
Edge 1.
ee If the pulse width is outside the limits, adjust the pulse generator channel 2 width and
select the oscilloscope Precision Edge Find until the pulse width is within limits.
22
Check the clock period. Using the oscilloscope, verify that the clock period is 10 ns,
+0 ps or − 250 ps.
aa In the oscilloscope Timebase menu, select Sweep Speed 2.00 ns/div.
bb Select Delay. Using the oscilloscope knob, position the clock waveform so that a
rising edge appears at the left of the display.
cc In the oscilloscope Measure menu, select Measure Chan 2, then select Period. If the
period is more than or equal to 10.000 ns, go to step 4. If the period is less than 10.000
ns but greater than 9.75 ns, go to the next page.
dd In the oscilloscope Timebase menu, add 10 ns to the delay.
ee In the oscilloscope Measure menu, select Period. If the period is more than or equal
to 10.000 ns, decrease the pul se generator Chan 2 Doub in 10-ps increments until one
of the two periods measured is less than 10.000 ns but greater than 9.75 ns (see
following illustration, next page).
Testing Performance
To test the single-clock, single-edge, state acquisition (logic analyzer)
3–28
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