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HP 1660 Series User Manual

HP 1660 Series
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Oscilloscope Tests (Scope PV)
The following self-tests check the major components of the HP 1660AS-series oscilloscope
board as well as all associated circuitry. When the self-tests have all been completed with a
"PASS" status, the major data and control pipelines in the HP 1660AS-series oscilloscope
board are functioning properly.
Data Memory TestDat a Memor y Test This test verifies the correct operation of the FISO
(fast-in/slow-out) data memory on the board. Test patterns are written into the memory
and then read and compared with known values.
Timebase TestTi mebase Test The pre-trigger and post-t rigger delay modes are first tested by
programming a predetermined time interval in the trigger counters. At the end of the
time intervals, the arm, t rigger, and run status bits are read and compared wit h known
values. The coarse and fine interpolators are then checked by reading the values of the
int erpolat or count ers aft er a simulat ed acquisit ion. The count er values are t hen
compared with a known value. Finally, the sample clock is checked by programming a
sample clock frequency and then reading the status of the clock to detect when one
clock period has elapsed. The clock period time interval is then compared with a known
value.
A/D TestA/D Test This test verifies the correct operation of the A/D convertor on the board. A
check of the trigger in Trigger Immediate mode is first made. The A/D convertors are
then exercised by setting the reference voltage and channel offset such that a simulated
acquisition obtains data in the extremes and middle of the quantization range of the A/D
convertor. After each simulated acquisition, the data is compared with known values.
D/A TestD/A Test This test verifies the correct operation of the D/A convertor on the board.
Bot h the offset and trigger level D/A convertors for each channel are set t o a reference
level and then changed. The logic trigger IC is programmed to detect t he changes. The
detection of a correct trigger indicates that the D/A convert or is operating normally.
Tr i gger TestTr i gger Test This test verifies the correct operation of t he trigger components on the
board. First, the logic trigger memory is checked by writing and then reading known
patterns. The logic qualifiers, logic trigger output, and trigger holdoff are then checked.
IMB Test IMB Test This test verifies the correct operation of the oscilloscope board interface to
the intermodule bus.
Al l Test s All Tests This will automatically execute each test, one at a time, until all tests are
done.
Theory of Operation
Oscilloscope Tests (Scope PV)
8–18

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HP 1660 Series Specifications

General IconGeneral
CategoryLogic Analyzer
Glitch TriggerYes
Pattern TriggerYes
State AnalysisYes
Transitional TimingYes
Trigger ModesEdge, Pattern, Glitch

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