Microsemi IGLOO2 - Page 92

Board Design and Layout Checklist
AC393 Application Note Revision 14.0 84
23. SerDes Power Supplies
– SERDES VDD - VDD
– SERDES VDDAIO - 1.2 V
– SERDES VDDAPLL to REFRET through resistor-capacitor (RC) filter circuitry
(2.5 V)
– SERDES PLL VDDA to PLL VSSA through RC filter circuitry - 2.5 V or 3.3 V
VDDA PLL Filter
– REFRET for the SerDes serves as the local on-chip ground return path for
VDDAPLL. Therefore, external board ground must not short with REFRET
under any circumstances.
– A high precision 1.21K_1% Ù resistor is required to connect between REXT
and REFRET.
For detailed information about power supplies, see Figure 1, page 5.
24. If SERDES transceiver is not used, the pins need to be connected as follows:
– SERDES VDD - VDD
– SERDES VDDAIO - 1.2 V
– SERDES VDDAPLL - 1.2 V or 2.5 V
– SERDES PLL VDDA - 2.5 V or 3.3 V
– SERDES PLL VSSA - Ground
25. V
REF
Power Supply
Design V
REF
pins to be noise free. V
REF
should be equal to half of VDDQ.
See Figure 16, page 30.
26. Other Supplies
CCC PLL VDDA to PLL VSSA through RC filter circuitry- 2.5 V/ 3.3 V.
DDR PLL VDDA to PLL VSSA through RC filter circuitry- 2.5 V/ 3.3 V.
All PLL VDDA supplies must be tied to same supply source (either 2.5 V or 3.3
V). Using the Libero SoC software, a single supply can be selected globally.
27. Decoupling Capacitors
Perform power integrity (PI) analysis through the PI tool, and analyze the
decoupling capacitor values and placement on the PCB.
28. Unused Condition
For unused conditions of power supply pins, see the corresponding pin
assignment table available on the following pages:
SmartFusion2 SoC FPGA Documentation
IGLOO2 FGPA Documentation
Also see Figure 4, page 14.
29. Brownout Detection (BOD) Circuit
Ensure that brownout detection is implemented standalone or included as part
of power management circuitry. See Brownout Detection (BOD), page 36.
Table 23 • Design Checklist (continued)
S.No. Checklist Yes/No