Abov A96G166 User Manual

11. Timer 0/1/2 A96G166/A96A166/A96S166 User’s manual
108
11.3.2 16-bit capture mode
Timer 2 capture mode is set by configuring T2MS[1:0] as ‘01’. It uses an internal clock as a clock
source. Basically, the 16-bit timer 2 capture mode has the same function as the 16-bit timer/counter
mode, and the interrupt occurs when T2CNTH/T2CNTL is equal to T2ADRH/T2ADRL. The T2CNTH,
T2CNTL values are automatically cleared by a match signal. It can be cleared by software (T2CC) too.
A timer interrupt in capture mode is very useful when the pulse width of captured signal is wider than
the maximum period of timer. Capture result is loaded into T2BDRH/T2BDRL. In timer 2 capture
mode, timer 2 output (T2O) waveform is not available.
According to EIPOL1 registers setting, the external interrupt EINT12 function is selected. EINT12 pin
must be set as an input port.
A Match
T2CC
T2EN
P
r
e
s
c
a
l
e
r
fx
M
U
X
fx/2
fx/4
fx/64
fx/512
fx/2048
fx/8
fx/1
16-bit Counter
T2CNTH/T2CNTL
16-bit B Data Register
T2BDRH/T2BDRL
Clear
Comparator
16-bit A Data Register
T2ADRH/T2ADRL
T2IFR
INT_ACK
Clear
To interrupt
block
A Match
Buffer Register A
Reload
R
EINT12
T2CNTR
T2EN
3
T2CK[2:0]
Clear
FLAG12
(EIFLAG1.6)
INT_ACK
Clear
To interrupt
block
T2MS[1:0]
2
A Match
T2CC
T2EN
T2EN
T2CRH
1
ADDRESS:C3H
INITIAL VALUE : 0000_0000B
–
T2MS1 T2MS0
– – –
T2CC
–
0 1
– – –
X
T2CK2
T2CRL
X
ADDRESS:C2H
INITIAL VALUE : 0000_0000B
T2CK1 T2CK0 T2IFR T2ECS T2POL T2ECE T2CNTR
X X X X X X X
EIPOL[5:4]
2
M
U
X
Edge
Detector
T2ECE
T2ECS
T1 A Match
EC2
NOTE: T1 A Match is a pulse for the timer 2 clock source if it is selected.
Figure 51. 16-bit Capture Mode of Timer 2

Abov A96G166 Specifications

General

Brand	Abov
Model	A96G166
Category	Computer Hardware
Language	English