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Abov A96G166 User Manual

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A96G166/A96A166/A96S166 User’s manual 20. Electrical characteristics
209
Figure 105. SPI master mode timing (UCPHA = 0, MSB first)
NOTE: When in Synchronous mode, the START bit becomes MSB and the 1
st
or 2
nd
STOP bit
becomes LSB.
Figure 106. SPI/Synchronous master mode timing (UCPHA = 1, MSB first)
XCK0
(UCPOL=1)
(OUTPUT)
MOSI
(OUTPUT)
MISO
(INPUT)
t
XCK
0.8VDD
0.2VDD
t
SOM
XCK0
(UCPOL=0)
(OUTPUT)
t
XCKH
t
XCKL
/SS0
(OUTPUT)
MSB
LSB
LSB
MSB
t
SIM
t
HIM
t
DIS
t
LAG
t
LEAD
t
SOM
BIT 6 … 1
BIT 6 … 1
t
HOM
t
LAG
XCKx
(UCPOL=1)
(OUTPUT)
MOSI/TX1
(OUTPUT)
MISO/RX1
(INPUT)
t
XCK
0.8VDD
0.2VDD
t
HOM
XCKx
(UCPOL=0)
(OUTPUT)
t
XCKH
t
XCKL
/SS0
(OUTPUT)
MSB
LSB
LSB
MSB
t
SIM
t
HIM
t
DIS
t
LEAD
t
SOM
BIT 6 … 1
BIT 6 … 1

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Abov A96G166 Specifications

General IconGeneral
BrandAbov
ModelA96G166
CategoryComputer Hardware
LanguageEnglish

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