9. Watchdog timer A96G166/A96A166/A96S166 User’s manual
Table 12. Setting of window open period
Setting of window open period
50%, WINDOW[1:0]=00b & WDTPDON = 1
75%, WINDOW[1:0]=01b & WDTPDON = 1
100%, WINDOW[1:0]=10b & WDTPDON = 1
75 % Interval
Controller
WDTCR
WDTEN
To RESET
Circuit
WDTIFR
To interrupt
block
INT_ACK
clear
WDTIDR
WDTC
Overflow Time
Selector
WDOVF[2:0]
Check
Identification
Window
Selector
WDTPDON
clear
WDTRTI
WINDOW[1:0]
INTERNAL BUS
8
8
WDT Clock
(TYP 4KHz)
stop/idle
DIV/32
WDT16-Bit CNT
Write detector to
WDTE except 96H
fLSIRC
=128KHz
Figure 29. Watch Dog Timer Block Diagram
9.3 Register map
Table 13. Watchdog Timer Register Map
Watch Dog Timer Clear Register
Watch Dog Timer Status Register
Watch Dog Timer Identification Register
Watch Dog Timer Control Register
Watch Dog Timer Count H Register
Watch Dog Timer Count L Register