11. Timer 0/1/2 A96G166/A96A166/A96S166 User’s manual
11.3.3 16-bit PPG mode
TIMER 2 has a PPG (Programmable Pulse Generation) function. In PPG mode, T2O/PWM2O pin
outputs up to 16-bit resolution PWM output. For this function, T2O/PWM2O pin must be configured as
a PWM output by setting P1FSRL[7:6] or P0FSRH[3:2] to ‘01’. Period of the PWM output is
determined by T2ADRH/T2ADRL, and duty of the PWM output is determined by T2BDRH/T2BDRL.
T2MS[1:0]
T2POL
Reload
A Match
T2CC
T2EN
P
r
e
s
c
a
l
e
r
fx
M
U
X
fx/2
fx/4
fx/64
fx/512
fx/2048
fx/8
fx/1
Comparator
16-bit Counter
T2CNTH/T2CNTL
16-bit B Data Register
T2BDRH/T2BDRL
Clear
B Match
Buffer Register B
Comparator
16-bit A Data Register
T2ADRH/T2ADRL
T2IFR
INT_ACK
Clear
To interrupt
block
A Match
Buffer Register A
Reload
Pulse
Generator
T2O/
PWM2O
R
T2EN
3
T2CK[2:0]
2
A Match
T2CC
T2EN
A Match
T2CC
T2EN
T2EN
T2CRH
1
ADDRESS:C3H
INITIAL VALUE : 0000_0000B
–
T2MS1 T2MS0
– – –
T2CC
–
1 1
– – –
X
T2CK2
T2CRL
X
ADDRESS:C2H
INITIAL VALUE : 0000_0000B
T2CK1 T2CK0 T2IFR T2ECS T2POL T2ECE T2CNTR
X X X X X X X
M
U
X
Edge
Detector
T2ECE
T2ECS
T1 A Match
EC2
NOTES:
1. T2EN is automatically cleared to logic “0” after one pulse is generated at a PPG one-shot mode.
2. T1 A Match is a pulse for the timer 2 clock source if it is selected.
Figure 54. 16-bit PPG Mode of Timer 2