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Abov A96G166 - 14 I2 C; 14.1-14.6 I2 C Bus Operations

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A96G166/A96A166/A96S166 User’s manual 14. I2C
123
14 I2C
I2C is one of industrial standard serial communication protocols, which uses 2 bus lines such as
Serial Data Line (SDA) and Serial Clock Line (SCL) to exchange data. Because both SDA and SCL
are open-drain outputs, each line needs a pull-up resistor respectively.
Their features are listed as shown below:
Compatible with I2C bus standard
Multi-master operation
Up to 400 kHz data transfer speed
7 bit address
Support 2 slave addresses
Both master and slave operation
Bus busy detection
14.1 Block Diagram
Debounce
enable
SDA
Noise
Canceller
(debounce)
1
0
SDA OUT
SDA
Out Controller
Debounce
enable
1
0
SCLIN
SDA
Out Controller
Noise
Canceller
(debounce)
SCL OUT
SCL
Slave Addr. Register
(I2CSAR)
Slave Addr. Register1
(I2CSAR1)
8-bit Shift Register
(SHFTR)
Data Out Register
(I2CDR)
SCL High Period Register
(I2C SCLHR)
SCL Low Period Register
(I2C SCLLR)
SCL Hold Period Register
(I2C DAHR)
I
N
T
E
R
N
A
L
B
U
S
L
I
N
E
F/F
Figure 62. I
2
C Block Diagram

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