Program and erase time is controlled by setting FETCR register. Program and erase timer uses 10-bit
counter. It increases by one at each RING clock frequency (f
LSI
=128kHz).
It is cleared when program or erase starts. Timer stops when 10-bit counter is same to FETCR.
PEVBSY is cleared when program, erase or verify starts and set when program, erase or verify stops.
 Max program/erase time at INTRC/256 clock : (255+1) * 2 * (7.8125us) = 4.0ms
In the case of ±10% of error rate of counter source clock, program or erase time is 3.6~4.4ms.
* Program/erase time calculation
 For page write or erase = Tpe = (TCON+1) * 2 * (f
LSI
)
 For bulk erase, Tbe = (TCON+1) * 4 * (f
LSI
)
 Recommended bulk erase time : FETCR = 57h
 Recommended program / page erase time : FETCR = AFh
Table 38. Program and Erase Time