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Abov A96G166 - Table 38. Program and Erase Time

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19. Memory programming A96G166/A96A166/A96S166 User’s manual
188
FETCR (Flash Time control Register): 1023H
7
6
5
4
3
2
1
0
TCR7
TCR6
TCR5
TCR4
TCR3
TCR2
TCR1
TCR0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: 00H
TCR[7:0]
Flash Time control
Program and erase time is controlled by setting FETCR register. Program and erase timer uses 10-bit
counter. It increases by one at each RING clock frequency (f
LSI
=128kHz).
It is cleared when program or erase starts. Timer stops when 10-bit counter is same to FETCR.
PEVBSY is cleared when program, erase or verify starts and set when program, erase or verify stops.
Max program/erase time at INTRC/256 clock : (255+1) * 2 * (7.8125us) = 4.0ms
In the case of ±10% of error rate of counter source clock, program or erase time is 3.6~4.4ms.
* Program/erase time calculation
For page write or erase = Tpe = (TCON+1) * 2 * (f
LSI
)
For bulk erase, Tbe = (TCON+1) * 4 * (f
LSI
)
Recommended bulk erase time : FETCR = 57h
Recommended program / page erase time : FETCR = AFh
Table 38. Program and Erase Time
Min
Typ
Max
Unit
Program/erase time
2.4
2.5
2.6
ms

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