A96G166/A96A166/A96S166 User’s manual 18. Reset
18.6 Register Map
Table 36. Reset Operation Register Map
Low Voltage Reset Control Register
Low Voltage Indicator Control Register
18.7 Reset operation register description
RSTFR (Reset Flag Register): E8H
Power-On Reset flag bit. The bit is reset by writing ‘0’ to this bit.
External Reset (RESETB) flag bit. The bit is reset by writing ‘0’ to
this bit or by Power-On Reset.
Watch Dog Reset flag bit. The bit is reset by writing ‘0’ to this bit or
by Power-On Reset.
On-chip debugger reset flag bit. The bit reset by writing ‘0’ to this bit
or by Power-On Reset
Low Voltage Reset flag bit. The bit is reset by writing ‘0’ to this bit or
by Power-On Reset.
CRC Reset flag bit. The bit is reset by writing ‘0’ to this bit or by
Power-On Reset.
NOTES:
1. When the Power-On Reset occurs, the PORF bit is only set to “1”, the other flag (WDTRF) bits are all
cleared to “0”.
2. When the Power-On Reset occurs, the EXTRF bit is unknown, at that time, the EXTRF bit can be set
to “1” when External Reset (RESETB) occurs.
3. When the Power-On Reset occurs, the LVRF bit is unknown, at that time, the LVRF bit can be set to “1”
when LVR Reset occurs.
4. When a reset except the POR occurs, the corresponding flag bit is only set to “1”, the other flag bits
are kept in the previous values.
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