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Abov A96G166 User Manual

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6. Interrupt controller A96G166/A96A166/A96S166 User’s manual
60
6.6 Multi-interrupt
If two requests of different priority levels are received simultaneously, the request of higher priority
level is served first. If more than one interrupt request are received, the interrupt polling sequence
determines which request is served first by hardware. However, for special features, multi-interrupt
processing can be executed by software.
Figure 21. Effective Timing of Multi-Interrupt
Figure 21 shows an example of multi-interrupt processing. While INT1 is served, INT0 which has
higher priority than INT1 is occurred. Then INT0 is served immediately and then the remaining part of
INT1 service routine is executed. If the priority level of INT0 is same or lower than INT1, INT0 will be
served after the INT1 service has completed.
An interrupt service routine may be only interrupted by an interrupt of higher priority and, if two
interrupts of different priority occur at the same time, the higher level interrupt will be served first. An
interrupt cannot be interrupted by another interrupt of the same or a lower priority level. If two
interrupts of the same priority level occur simultaneously, the service order for those interrupts is
determined by the scan order.
Main Program
Service
Occur
INT1 Interrupt
INT1 ISR
Occur
INT0 Interrupt
INT0 ISR
RETI
RETI
Set EA

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Abov A96G166 Specifications

General IconGeneral
BrandAbov
ModelA96G166
CategoryComputer Hardware
LanguageEnglish

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