A96G166/A96A166/A96S166 User’s manual 11. Timer 0/1/2
11.2.3 16-bit PPG mode
TIMER 1 has a PPG (Programmable Pulse Generation) function. In PPG mode, T1O/PWM1O pin
outputs up to 16-bit resolution PWM output. For this function, T1O/PWM1O pin must be configured as
a PWM output by setting P0FSRH[3:2] or P1FSRL[1:0] or P1FSRL[5:4] to ‘01’. Period of the PWM
output is determined by T1ADRH/T1ADRL, and duty of the PWM output is determined by
T1BDRH/T1BDRL.
T1MS[1:0]
T1POL
Reload
A Match
T1CC
T1EN
P
r
e
s
c
a
l
e
r
fx
M
U
X
fx/2
fx/4
fx/64
fx/2048
fx/8
fx/1
Comparator
16-bit Counter
T1CNTH/T1CNTL
16-bit B Data Register
T1BDRH/T1BDRL
Clear
B Match
Edge
Detector
T1ECE
EC1
Buffer Register B
Comparator
16-bit A Data Register
T1ADRH/T1ADRL
T1IFR
INT_ACK
Clear
To interrupt
block
A Match
Buffer Register A
Reload
Pulse
Generator
T1O/
PWM1O
R
T1EN
3
T1CK[2:0]
2
T1EN
T1CRH
1
ADDRESS:BBH
INITIAL VALUE : 0000_0000B
T1BEN T1MS1 T1MS0
– –
T1PE T1CC
X 1 1
– –
X X
T1CK2
T1CRL
X
ADDRESS:BAH
INITIAL VALUE : 0000_0000B
T1CK1 T1CK0 T1IFR T1BPOL T1POL T1ECE T1CNTR
X X X X X X X
A Match
T1CC
T1EN
A Match
T1CC
T1EN
T1PE
HSIRC
NOTE: T1EN is automatically cleared to logic “0” after one pulse is generated at a PPG one-shot mode
Figure 44. 16-bit PPG Mode of Timer 1
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