6.3 Interrupt vector table
Interrupt controller of A96G166/A96A166/A96S166 supports 21 interrupt sources as shown in Table 8.
When interrupt is served, long call instruction (LCALL) is executed and program counter jumps to the
vector address. All interrupt requests have their own priority order.
Table 8. Interrupt Vector Address Table
For maskable interrupt execution, EA bit must set ‘1’ and specific interrupt must be enabled by writing
‘1’ to associated bit in the IEx. If an interrupt request is received, the specific interrupt request flag is
set to ‘1’.
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