Abov A96G166 User Manual

11. Timer 0/1/2 A96G166/A96A166/A96S166 User’s manual
114
T2CRL (Timer 2ControlLow Register): C2H
7
6
5
4
3
2
1
0
T2CK2
T2CK1
T2CK0
T2IFR
T2ECS
T2POL
T2ECE
T2CNTR
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: 00H
T2CK[2:0]
Select Timer 2 clock source. fx is main system clock frequency
T2CK2
T2CK1
T2CK0
Description
0
0
0
Fx2048
0
0
1
fx/512
0
1
0
fx/64
0
1
1
fx/8
1
0
0
fx/4
1
0
1
fx/2
1
1
0
fx/1
1
1
1
Selected clock by T2ECS bit
T2IFR
When T2 Match Interrupt occurs, this bit becomes ‘1’. For clearing bit,
write ‘0’ to this bit or auto clear by INT_ACK signal. Writing “1” has no
effect.
0
T2 interrupt no generation
1
T2 interrupt generation
T2ECS
Timer 2 External Clock Selection
0
Select external clock (EC2)
1
Select Timer 1 A Match
T2POL
T2O/PWM2O Polarity Selection
0
Start High (T2O/PWM2O is low level at disable)
1
Start Low (T2O/PWM2O is high level at disable)
T2ECE
Timer 2 External Clock Edge Selection
0
External clock falling edge
1
External clock rising edge
T2CNTR
Timer 2 Counter Read Control
0
No effect
1
Load the counter value to the B data register (When write,
automatically cleared “0” after being loaded)

Abov A96G166 Specifications

General

Brand	Abov
Model	A96G166
Category	Computer Hardware
Language	English