19. Memory programming A96G166/A96A166/A96S166 User’s manual
FECR (Flash Control Register): 1021H
Enable flash bulk erase mode
Disable bulk erase mode of Flash memory
Enable bulk erase mode of Flash memory
Exit from program mode. It is cleared automatically after 1 clock
Don’t exit from program mode
Don’t exit from program mode
Don’t exit from program mode
Start to program or erase of Flash. It is cleared automatically after 1
clock
Start to program or erase of Flash
Start auto-verify of Flash. It is cleared automatically after 1 clock
Start to program or erase of Flash
Reset Flash control logic. It is set automatically after 1 clock
Reset Flash control logic
Reset page buffer with PBUFF. It is set automatically after 1 clock
Page buffer select register reset
NOTE: WRITE and READ bits can be used in program, erase and verify mode with FEAR registers. Read or
writes for memory cell or page buffer uses read and write enable signals from memory controller.
Indirect address mode with FEAR is only allowed to program, erase and verify
FESR (Flash Status Register): 1022H
Operation status flag. It is cleared automatically when operation starts.
Operations are program, erase or verification
Busy (Operation processing)
Remapping for check the serial ID.
Remapping OTP area to FFC0~FFFF.
Flash interrupt request flag. Auto-cleared when program/erase/verify
starts. Active in program/erase/verify completion
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