Abov A96G166 - Page 246

Revision history A96G166/A96A166/A96S166 user’s manual
246
Ordering Information.
Updated the table and figures for USART characteristics in 20 Electrical
characteristics.
Corrected the typo for Flash size at Figure 1.
A96G166/A96A166/A96S166 Block Diagram.
2020.07.31
1.07
Corrected the typo of P2FSRH and P3FSRL at 5.4 P2 port and 5.5 P3
port paragraph.
2020.08.31
1.08
Advanced Flash Endurance times from 10,000 to 30,000.
2020.09.28
1.09
Updated the initial value at Table 5. SFR Map.
Updated a typo at Figure 86. Fast VDD Rising Time and Figure 87.
Internal RESET Release Timing On Power-Up.
2021.01.13
1.10
Added a new device of A96A166FD.
Modified the bit position of EIPOL1 at 6.11.6 Interrupt register
description.
Modified the invalid number of USART at Table 1.
A96G166/A96A166/A96S166 Device Features and Peripheral Counts.
2021.04.02
1.11
Corrected the typo of P3FSRL and IE2 at 5.5.2 Register description for
P3 and 6.11.1 Interrupt Enable Register (IE, IE1, IE2, and IE3).
2021.04.22
1.12
Corrected the description of CONFIGURE OPTION 1 register at 19.6
Configure option.
Updated High Speed Internal RC Oscillator Tolerance at Table 50. High
Speed Internal RC Oscillator Characteristics.
Corrected the frequency unit from KHz to kHz.
2021.05.20
1.13
Updated the U1STAT SFR Address(0xF8→0xF7)