Abov A96G166 User Manual

A96G166/A96A166/A96S166 User’s manual 5. I/O ports
45
P1OD (P1 Open-drain Selection Register): 92H
7
6
5
4
3
2
1
0
P17OD
P16OD
P15OD
P14OD
P13OD
P12OD
P11OD
P10OD
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: 00H
P1OD[7:0]
Configure Open-drain of P1 Port
0
Push-pull output
1
Open-drain output
P12DB (P1/P2 De-bounce Enable Register): DFH
7
6
5
4
3
2
1
0
P23DB
P22DB
P21DB
P20DB
P13DB
P12DB
P11DB
P10DB
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: 00H
P23_DB
Configure De-bounce of P23 Port
0
Disable
1
Enable
P22_DB
Configure De-bounce of P22 Port
0
Disable
1
Enable
P21_DB
Configure De-bounce of P21 Port
0
Disable
1
Enable
P20_DB
Configure De-bounce of P20 Port
0
Disable
1
Enable
P13_DB
Configure De-bounce of P13 Port
0
Disable
1
Enable
P12_DB
Configure De-bounce of P12 Port
0
Disable
1
Enable
P11_DB
Configure De-bounce of P11 Port
0
Disable
1
Enable
P10_DB
Configure De-bounce of P10 Port
0
Disable
1
Enable
NOTES:
1. If the same level is not detected on enabled pin three or four times in a row at the sampling clock, the
signal is eliminated as noise.
2. A pulse level should be input for the duration of 3 clock or more to be actually detected as a valid edge.
3. The port de-bounce is automatically disabled at stop mode and recovered after stop mode release.
4. Refer to the port 0 de-bounce enable register (P0DB) for the de-bounce clock of port 1 and port 5.

Abov A96G166 Specifications

General

Brand	Abov
Model	A96G166
Category	Computer Hardware
Language	English