Jazelle DBX registers
ARM DDI 0388I Copyright © 2008-2012 ARM. All rights reserved. 5-9
ID073015 Non-Confidential
To access the Jazelle Configurable Opcode Translation Table Register, write the CP14 register
with:
MCR p14, 7, <Rd>, c4, c0, 0; Write Jazelle Configurable Opcode Translation
Table Register
[15:10] Opcode Contains the bottom bits of the configurable opcode
[9:4] - UNK/SBZP
[3:0] Operation Contains the code for the operation
0x0
-
0x9
Table 5-6 Jazelle Configurable Opcode Translation Table Register bit assignments
Bits Name Function
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