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System Control

ID073015 Non-Confidential

Table 4-1 describes the column headings that the CP15 register summary tables use throughout

this section.

Table 4-1 Column headings definition for CP15 register summary tables

Column name Description

CRn Register number within the system control coprocessor

Op1 Opcode_1 value for the register

CRm Operational register number within CRn

Op2 Opcode_2 value for the register

Name Short form architectural, operation, or code name for the register

Reset Reset value of register

Description Cross-reference to register description

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ARM Cortex A9 Specifications

General

Architecture	ARMv7-A
Cores	1-4
SIMD Extensions	NEON
ISA	ARM
Microarchitecture	Cortex-A9
Instruction Width	32-bit
Data Width	32-bit
MMU	Yes
Instruction Set	ARMv7-A
Clock Speed	Up to 2 GHz
L1 Cache	32 KB Instruction, 32 KB Data (per core)
Process Technology	40 nm, 28 nm
Floating Point Unit	VFPv3
Pipeline Depth	8 stages
Power Consumption	Low power design