Fujitsu 8FX User Manual

MB95630H Series
96 FUJITSU SEMICONDUCTOR LIMITED MN702-00009-2v0-E
CHAPTER 7 TIME-BASE TIMER
7.5 Register
7.5.1 Time-base Timer Control Register (TBTC)
The time-base timer control register (TBTC) selects the interval time, clears the
counter, controls interrupts and checks the status of the time-base timer.
■ Register Configuration
■ Register Functions
[bit7] TBIF: Time-base timer interrupt request flag bit
This bit is set to "1" when the interval time selected by the time-base timer has elapsed.
When this bit and the time-base timer interrupt request enable bit (TBIE) are set to "1", an interrupt request is
output.
When read by the read-modify-write (RMW) type of instruction, this bit always returns "1".
[bit6] TBIE: Time-base timer interrupt request enable bit
This bit enables or disables output of interrupt requests to interrupt controller.
When this bit and the time-base timer interrupt request flag bit (TBIF) are set to "1", a time-base timer
interrupt request is output.
[bit5] Undefined bit
The read value is always "0". Writing a value to this bit has no effect on operation.
bit 7 6 5 4 3 2 1 0
Field TBIF TBIE — TBC3 TBC2 TBC1 TBC0 TCLR
Attribute R/W R/W — R/W R/W R/W R/W W
Initial value 0 0 0 0 0 0 0 0
bit7 Details
Reading "0" Indicates that the interval time has not elapsed.
Reading "1" Indicates that the interval time has elapsed.
Writing "0" Clears this bit.
Writing "1" Has no effect on operation.
bit6 Details
Writing "0" Disables the time-base timer interrupt request.
Writing "1" Enables the time-base timer interrupt request.

Fujitsu 8FX Specifications

General

Brand	Fujitsu
Model	8FX
Category	Computer Hardware
Language	English