MB95630H Series
490 FUJITSU SEMICONDUCTOR LIMITED MN702-00009-2v0-E
CHAPTER 23 UART/SIO DEDICATED BAUD RATE GENERATOR
23.4 Registers
23.4.1 UART/SIO Dedicated Baud Rate Generator
Prescaler Select Register ch. n (PSSRn)
The UART/SIO dedicated baud rate generator prescaler select register ch. n
(PSSRn) controls the output of the baud rate clock and the prescaler.
â– Register Configuration
â– Register Functions
[bit7:3] Undefined bits
Their read values are always "0". Writing values to these bits has no effect on operation.
[bit2] BRGE: Baud rate clock output enable bit
This bit enables or disables outputting the baud rate clock "BRCLK".
When "1" is written to this bit, the value of the BRS[7:0] bits in the BRSRn register is loaded to the 8-bit
downcounter and BRCLK to be supplied to the UART/SIO is output.
Writing "0" to this bit stops the output of BRCLK.
[bit1:0] PSS[1:0]: Prescaler select bits
These bits select a prescaler.
bit 7 6 5 4 3 2 1 0
Field — — — — — BRGE PSS1 PSS0
Attribute — — — — — R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
bit2 Details
Writing "0" Disables outputting the baud rate clock.
Writing "1" Enables outputting the baud rate clock.
bit1:0 Details
Writing "00" 1
Writing "01" 1/2
Writing "10" 1/4
Writing "11" 1/8