Fujitsu 8FX User Manual

MB95630H Series
370 FUJITSU SEMICONDUCTOR LIMITED MN702-00009-2v0-E
CHAPTER 20 16-BIT RELOAD TIMER
20.7 Registers
20.7.1 16-bit Reload Timer Control Status Register
(Upper) ch. n (TMCSRHn)
The 16-bit reload timer control status register (upper) ch. n (TMCSRHn) sets the
operating mode and operating conditions of the 16-bit reload timer.
■ Register Configuration
■ Register Functions
[bit7:6] Undefined bits
Their read values are always "0". Writing values to these bits has no effect on operation,
[bit5:3] CSL[2:0]: Count clock select bits
These bits select the count clock for the 16-bit reload timer.
When a value between "0b000" and "0b110" inclusive is written to these bits, the 16-bit reload timer counts
with the internal clock (internal clock mode). The internal clock is generated by the prescaler. For details, see
"3.9 Operation of Prescaler".
When "0b111" is written to these bits, the 16-bit reload timer counts with the edge of the external event clock
(event count mode).
*: MCLK: machine clock
F
CH
: main clock
F
MCRPLL
: main CR PLL clock
F
CRH
: main CR clock
bit 7 6 5 4 3 2 1 0
Field — — CSL2 CSL1 CSL0 MOD2 MOD1 MOD0
Attribute — — R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
bit5:3
Details
Operating mode Count clock*
Writing "000"
Internal clock mode
1 MCLK
Writing "001" MCLK/2
Writing "010" MCLK/4
Writing "011" MCLK/8
Writing "100" MCLK/16
Writing "101" MCLK/32
Writing "110"
F
CH
/2
7
or F
CRH
/2
6
or F
MCRPLL
/2
6
Writing "111" Event count mode External clock

Fujitsu 8FX Specifications

General

Brand	Fujitsu
Model	8FX
Category	Computer Hardware
Language	English