MB95630H Series
34 FUJITSU SEMICONDUCTOR LIMITED MN702-00009-2v0-E
CHAPTER 3 CLOCK CONTROLLER
3.3 Registers
3.3.5 System Clock Control Register 2 (SYCC2)
The system clock control register 2 (SYCC2) indicates the respective
stabilization conditions of main clock oscillation, subclock oscillation, main CR
clock oscillation and sub-CR clock oscillation, and controls main clock
oscillation, subclock oscillation, main CR clock oscillation and sub-CR clock
oscillation.
â– Register Configuration
â– Register Functions
[bit7] SRDY: Subclock oscillation stabilization bit
This bit indicates whether the subclock oscillation has become stable.
This bit is read-only. Writing a value to this bit has no effect on operation.
[bit6] MRDY: Main clock oscillation stabilization bit
This bit indicates whether the main clock oscillation has become stable.
This bit is read-only. Writing a value to this bit has no effect on operation.
[bit5] SCRDY: Sub-CR clock oscillation stabilization bit
This bit indicates whether the sub-CR clock oscillation has become stable.
This bit is read-only. Writing a value to this bit has no effect on operation.
[bit4] MCRDY: Main CR clock oscillation stabilization bit
This bit indicates whether the main CR clock oscillation has become stable.
This bit is read-only. Writing a value to this bit has no effect on operation.
bit 7 6 5 4 3 2 1 0
Field SRDY MRDY SCRDY MCRDY SOSCE MOSCE SCRE MCRE
Attribute R R R R R/W R/W R/W R/W
Initial value X X X X 0 0 1 1
bit7 Details
Reading "0"
Indicates that the clock controller is in the subclock oscillation stabilization wait state or that the
subclock oscillation has stopped.
Reading "1" Indicates that the subclock oscillation wait time is over.
bit6 Details
Reading "0"
Indicates that the clock controller is in the main clock oscillation stabilization wait state or that the
main clock oscillation has stopped.
Reading "1" Indicates that the main clock oscillation wait time is over.
bit5 Details
Reading "0"
Indicates that the clock controller is in the sub-CR clock oscillation stabilization wait state or that
the sub-CR clock oscillation has stopped.
Reading "1" Indicates that the sub-CR clock oscillation wait time is over.
bit4 Details
Reading "0"
Indicates that the clock controller is in the main CR clock oscillation stabilization wait state or
that the main CR clock oscillation has stopped.
Reading "1" Indicates that the main CR clock oscillation wait time is over.