MB95630H Series
MN702-00009-2v0-E FUJITSU SEMICONDUCTOR LIMITED 551
CHAPTER 26 DUAL OPERATION FLASH MEMORY
26.5 Programming/Erasing Flash Memory
26.5.2 Programming Data to Flash Memory
This section explains the procedure for entering the program command to
program data to the Flash memory.
■ Programming Data to Flash Memory
• To invoke the automatic algorithm for programming data to the Flash memory, send
program commands in the command sequence table consecutively from the CPU to the
Flash memory.
• When data is programmed to a target address in the fourth cycle, the automatic algorithm is
invoked and starts automatic programming.
● Addressing method
Programming can be performed in any order of addresses and across a sector boundary. The
size of data that can be written by a single program command is one byte only.
● Note on programming data
• Bit data cannot be returned from "0" to "1" by programming. When "1" is written to bit data
that is currently "0", the data polling function (DQ7) or toggle operation (DQ6) is not
terminated, it is determined that Flash memory component is defective, and the execution
timeout flag (DQ5) indicates that an error has occurred because the execution time of the
automatic algorithm exceeds the programming time specified.
When data is read in the read/reset state, the bit data remains "0". To make the bit data
return from "0" to "1", erase the Flash memory.
• All commands are ignored during programming.
• During programming, if a hardware reset occurs, the integrity of data being written to the
current address is not guaranteed. Start programming the data from the chip erase command
or the sector erase command again.
■ Flash Memory Programming Procedure
• Figure 26.5-1 gives an example of the procedure for programming data to the Flash
memory. The hardware sequence flag can be used to check the operating state of the
automatic algorithm in the Flash memory. The data polling flag (DQ7) is used for checking
the end of programming data into Flash memory in this example.
• Data for flag checking is read from the address to which data has been last written.
• Since the data polling flag (DQ7) and the execution timeout flag (DQ5) are changed
simultaneously, check the data polling flag (DQ7) even when the execution timeout flag
(DQ5) is "1".
• Similarly, since the toggle bit flag (DQ6) stops toggling at the same time as the execution
timeout flag (DQ5) changes to "1", check DQ6 after DQ5 changes to "1".
To Next Page
Loading...
Need help?
General
