Fujitsu 8FX

MB95630H Series
MN702-00009-2v0-E FUJITSU SEMICONDUCTOR LIMITED 525
CHAPTER 24 I
2
C BUS INTERFACE
24.7 Registers
24.7.5 I
2
C Address Register ch. n (IAARn)
The I
2
C address register ch. n (IAARn) register sets the slave address.
In slave mode, the I
2
C bus interface receives address data from the master and
compares it with the value of this register.
■ Register Configuration
■ Register Functions
[bit7] Undefined bit
The read value of this bit is always "0". Writing a value to this bit has no effect on operation.
[bit6:0] A[6:0]
: Address bits
These bits set the slave address.
bit 7 6 5 4 3 2 1 0
Field — A6 A5 A4 A3 A2 A1 A0
Attribute — R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0