MB95630H Series
MN702-00009-2v0-E FUJITSU SEMICONDUCTOR LIMITED 307
CHAPTER 18 8/16-BIT PPG
18.2 Configuration
18.2 Configuration
This section shows the block diagram of the 8/16-bit PPG.
â– Block Diagram of 8/16-bit PPG
Figure 18.2-1 shows the block diagram of the 8/16-bit PPG.
Figure 18.2-1 Block Diagram of 8/16-bit PPG
Cycle setup register Duty setup buffer register
8-bit downcounter
(PPG timer n0)
CLK
START
STOP
BORROW
LOAD
Cycle setup register
Duty setup register
8-bit downcounter
(PPG timer n1)
CLK
START
STOP
BORROW
LOAD
PEN00
Edge
detection
PEN01
Edge
detection
MD1 MD0
1
0
01
S Q
R
REV00
PPG timer n0
PPG timer n1
S Q
R
REV01
1
0
PPGn1
Pin
1
0
1
0
10
PIE1
PPGn0
Pin
PUF1 POEN1
IRQXX
POEN1
PIE0
PUF0 POEN0
IRQXX
POEN0
Edge
detection
01
1
0
00
10
11
1
0
Used as the select signal of each selector
Duty setup register
Cycle setup
buffer register
Duty register buffer
cycle setup
Compa-
rator
circuit
Compa-
rator
circuit
Prescaler
CKS02 CKS01
CKS00
1 MCLK
MCLK/2
MCLK/4
MCLK/8
MCLK/16
MCLK/32
F
CH
/2
7
or F
CRH
/2
6
or F
MCRPLL
/2
6
F
CH
/2
8
or F
CRH
/2
7
or F
MCRPLL
/2
7
Prescaler
CKS12 CKS11
CKS10
1 MCLK
MCLK/2
MCLK/4
MCLK/8
MCLK/16
MCLK/32
F
CH
/2
7
or F
CRH
/2
6
or F
MCRPLL
/2
6
F
CH
/2
8
or F
CRH
/2
7
or F
MCRPLL
/2
7
To Next Page
Loading...
Need help?
General
