MB95630H Series
360 FUJITSU SEMICONDUCTOR LIMITED MN702-00009-2v0-E
CHAPTER 20 16-BIT RELOAD TIMER
20.5 Interrupt
20.5 Interrupt
The 16-bit reload timer outputs an interrupt request when an underflow occurs
on the 16-bit downcounter.
■ Interrupt of 16-bit Reload Timer
Table 20.5-1 shows the interrupt control bit and interrupt source of the 16-bit reload timer.
The 16-bit reload timer sets the underflow interrupt request flag bit (UF) in the 16-bit reload
timer control status register (lower) ch. n (TMCSRLn) to "1" when an underflow occurs in the
16-bit downcounter ("0x0000" → "0xFFFF"). If the underflow interrupt request has been
enabled (TMCSRLn:INTE = 1), the interrupt request will be output to the interrupt controller.
Table 20.5-1 Interrupt Control Bits and Interrupt Sources of 16-bit Reload Timer
Item Description
Interrupt request flag bit UF bit in TMCSRLn register
Interrupt request enable bit INTE bit in TMCSRLn register
Interrupt source Underflow of downcounter (TMRHn/TMRLn)
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