Fujitsu 8FX

MB95630H Series
MN702-00009-2v0-E FUJITSU SEMICONDUCTOR LIMITED 449
CHAPTER 21 MULTI-PULSE GENERATOR
21.6 Registers
21.6.9 16-bit MPG Noise Cancellation Control Register
(NCCR)
The 16-bit MPG noise cancellation control register (NCCR) controls the noise
pulse width to be cancelled on the DTTI pin and SNIx pin.
■ Register Configuration
■ Register Functions
[bit7:6] S2[1:0]: SNI2 noise width select bits
These bits select the noise width to be cancelled on the SNI2 pin.
[bit5:4] S1[1:0]: SNI1 noise width select bits
These bits select the noise width to be cancelled on the SNI1 pin.
[bit3:2] S0[1:0]: SNI0 noise width select bits
These bits select the noise width to be cancelled on the SNI0 pin.
[bit1:0] D[1:0]: DTTI noise width select bits
These bits select the noise width to be cancelled on the DTTI pin.
bit 7 6 5 4 3 2 1 0
Field S21 S20 S11 S10 S01 S00 D1 D0
Attribute R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
bit7:6 Details
Writing "00" 4-machine cycle noise
Writing "01" 8-machine cycle noise
Writing "10" 16-machine cycle noise
Writing "11" 32-machine cycle noise
bit5:4 Details
Writing "00" 4-machine cycle noise
Writing "01" 8-machine cycle noise
Writing "10" 16-machine cycle noise
Writing "11" 32-machine cycle noise
bit3:2 Details
Writing "00" 4-machine cycle noise
Writing "01" 8-machine cycle noise
Writing "10" 16-machine cycle noise
Writing "11" 32-machine cycle noise
bit1:0 Details
Writing "00" 4-machine cycle noise
Writing "01" 8-machine cycle noise
Writing "10" 16-machine cycle noise
Writing "11" 32-machine cycle noise