Fujitsu 8FX User Manual

MB95630H Series
MN702-00009-2v0-E FUJITSU SEMICONDUCTOR LIMITED 201
CHAPTER 14 LIN-UART
14.2 Configuration
■ Block Diagram of LIN-UART
Figure 14.2-1 Block Diagram of LIN-UART
● Reload counter
This block is a 15-bit reload counter functioning as a dedicated baud rate generator. The block
consists of a 15-bit register for reload values; it generates the transmit/receive clock from the
external or internal clock. The count value in the transmit reload counter is read from the baud
rate generator1, 0 (BGR1 and BGR0).
RDR
TDR
PEN
P
SBL
CL
AD
CRE
RXE
TXE
MD1
MD0
OTO
EXT
REST
SCKE
SOE
PE
ORE
FRE
RDRF
TDRE
BDS
RIE
TIE
LBIE
LBD
SOPE
SIOP
CCO
SCES
LBIE
LBD
RBI
RIE
TIE
IRQ
IRQ
LBD
SIN
PE
ORE
FRE
Machine
clock
SIN
SOT
MS
SSM
SCDE
TDRE
RDRF
RBI
TBI
UPCL
OTO,
EXT,
REST
PE
ORE
FRE
TBI
RBI
TBI
SIN
SCK
SOT
LBR
LBR
LBL1
LBL0
LBL1
LBL0
Pin
Pin
Pin
Reload
counter
Restart receive
reload counter
Over-
sampling
circuit
Internal signal
to 8/16-bit
composite timer
LIN break/
SynField
detection
circuit
Error
detection
Internal data bus
SSR
register
SMR
register
SCR
register
ESCR
register
ECCR
register
Bus idle
detection
circuit
LIN break
generation
circuit
Transmit
shift register
Start
transmis-
sion
Receive
shift register
Transmit
parity counter
Receive
parity counter
Receive
bit counter
Transmit
bit counter
Transmit
star
t circuit
Start bit
detection
circuit
Interrupt
generation
circuit
Transmit
control circuit
Receive control
circuit
Transmit clock
Receive clock
Receive
Transmit

Fujitsu 8FX Specifications

General

Brand	Fujitsu
Model	8FX
Category	Computer Hardware
Language	English