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Fujitsu 8FX

Fujitsu 8FX
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MB95630H Series
548 FUJITSU SEMICONDUCTOR LIMITED MN702-00009-2v0-E
CHAPTER 26 DUAL OPERATION FLASH MEMORY
26.4 Checking Automatic Algorithm
Execution Status
26.4.5 Toggle Bit2 Flag (DQ2)
The toggle bit2 flag (DQ2) is a hardware sequence flag using the toggle bit
function to indicate whether a read address is an erase target sector in the
sector erase suspend state and whether output data is toggled.
Toggle Bit2 Flag (DQ2)
Table 26.4-11 and Table 26.4-12 show the state transition of the toggle bit2 flag during normal
operation and the one during abnormal operation respectively.
At chip/sector erase
When read accesses are continuously made to a sector to be erased while the automatic
chip/sector erase algorithm is being executed, the Flash memory toggles the output between
"1" and "0" at each read access.
When read accesses are continuously made to a sector not to be erased while the automatic
chip/sector erase algorithm is being executed, the Flash memory outputs bit2 (DATA: 2) of
the value read from a read address of each read access.
At sector erase suspension
With a sector erase operation suspended, when read accesses are continuously made to a
sector to be erased, the Flash memory toggles the output between "1" and "0" whenever a
read access is made.
With a sector erase operation suspended, when read accesses are continuously made to a
sector not to be erased, the Flash memory outputs bit2 (DATA: 2) of the read value of a
read address whenever a read access is made.
Table 26.4-11 State Transition of Toggle Bit2 Flag (During Normal Operation)
Operating
state
Programming
Programming
completed
Chip/sector
erase
Erasing
completed
Sector erase
wait
Erasing started
Sector erase
Sector erase
suspended
(Sector being
erased)
Sector erase
suspended
Erasing resumed
(Sector being
erased)
Sector erase
being suspended
(Sector not being
erased)
DQ2 0 DATA: 2 Toggle 1 Toggle Toggle Toggle DATA: 2
Table 26.4-12 State Transition of Toggle Bit2 Flag (During Abnormal Operation)
Operating state Programming Chip/sector erase
DQ2 0 Toggle

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