MB95630H Series
102 FUJITSU SEMICONDUCTOR LIMITED MN702-00009-2v0-E
CHAPTER 8 HARDWARE/SOFTWARE WATCHDOG TIMER
8.2 Configuration
● Count clock selector
This selector selects the count clock of the watchdog timer counter.
● Watchdog timer counter
This is a 1-bit counter that uses the output of the time-base timer, of the watch prescaler or of
the sub-CR timer as the count clock.
● Reset control circuit
This circuit generates a reset signal when the watchdog timer counter overflows.
● Watchdog timer clear selector
This selector selects the watchdog timer clear signal.
● Counter clear control circuit
This circuit controls the clearing and stopping of the watchdog timer counter.
● Watchdog timer control register (WDTC)
This register performs setup for activating/clearing the watchdog timer counter as well as for
selecting the count clock.
■ Input Clock
The watchdog timer uses the output clock of the time-base timer, of the watch prescaler or of
the sub-CR timer as the input clock (count clock).