MB95630H Series
114 FUJITSU SEMICONDUCTOR LIMITED MN702-00009-2v0-E
CHAPTER 9 WATCH PRESCALER
9.2 Configuration
● Watch prescaler counter (counter)
This is a 16-bit downcounter that uses the subclock divided by two or the sub-CR clock divided
by two as its count clock.
● Counter clear circuit
This circuit controls the clearing of the watch prescaler.
● Interval timer selector
This circuit selects one out of the eight bits used for the interval timer among 17 bits available
in the watch prescaler counter.
● Watch prescaler control register (WPCR)
This register selects the interval time, clears the counter, controls interrupts and checks the
status.
■ Input Clock
The watch prescaler uses the subclock divided by two or the sub-CR clock divided by two as
its input clock (count clock).
■ Output Clock
The watch prescaler supplies its clock to the software watchdog timer.
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