xvii
498
CHAPTER 24 I
2
C BUS
INTERFACE
24.3 Channel
â– Channel of I
2
C Bus Interface
Table 24.3-2
Corrected the register name of the IBCR0n register.
I
2
C bus control register 0
→
I
2
C bus control register 0 ch. n
Corrected the register name of the IBCR1n register.
I
2
C bus control register 1
→
I
2
C bus control register 1 ch. n
Corrected the register name of the IBSRn register.
I
2
C bus status register
→
I
2
C bus status register ch. n
Corrected the register name of the IDDRn register.
I
2
C data register
→
I
2
C data register ch. n
Corrected the register name of the IAARn register.
I
2
C address register
→
I
2
C address register ch. n
Corrected the register name of the ICCRn register.
I
2
C clock control register
→
I
2
C clock control register ch. n
531
to
534
CHAPTER 25 EXAMPLE OF
SERIAL PROGRAMMING
CONNECTION
New chapter
568 CHAPTER 26 DUAL OPERATION
FLASH MEMORY
26.8.2 Flash Memory Status Register
(FSR)
â– Register Functions
Corrected Figure 26.8-1.
588 CHAPTER 27 NON-VOLATILE
REGISTER (NVR) INTERFACE
27.3.4 Watchdog Timer Selection ID
Register (Upper/Lower)
(WDTH/WDTL)
â– Register Configuration
Corrected the R/W attribute of the WDTH[7:0] bits in the
WDTH register.
R/W → R
Corrected the R/W attribute of the WDTL[7:0] bits in the
WDTL register.
R/W → R
Page Revisions (For details, see their respective pages.)