MB95630H Series
266 FUJITSU SEMICONDUCTOR LIMITED MN702-00009-2v0-E
CHAPTER 15 8/10-BIT A/D CONVERTER
15.2 Configuration
● Analog channel selector
This is the circuit selecting an input channel from several analog input pins.
● Sample-and-hold circuit
This circuit holds input voltage selected by the analog channel selector. By sampling the input
voltage and holding it immediately after A/D conversion starts, this circuit prevents A/D
conversion from being affected by the fluctuation in input voltage during the conversion
(comparison).
● Control circuit
The A/D conversion function determines the values in the 10-bit A/D data register sequentially
from MSB to LSB based on the voltage compare signal from the comparator. When A/D
conversion is completed, the A/D conversion function sets the interrupt request flag bit (ADC1:
ADI) to "1".
● 8/10-bit A/D converter data register (upper/lower) (ADDH/ADDL)
The upper two bits of 10-bit A/D data are stored in the ADDH register; the lower eight bits in
the ADDL register.
If the A/D conversion precision bit (ADC2:AD8) is set to "1", the A/D conversion precision
becomes 8-bit precision, and the upper eight bits of 10-bit A/D data are to be stored in the
ADDL register.
● 8/10-bit A/D converter control register 1 (ADC1)
This register is used to enable and disable different functions, select an analog input pin, and
check the status of the A/D converter.
● 8/10-bit A/D converter control register 2 (ADC2)
This register is used to select an input clock, enable and disable interrupts and control different
functions of the A/D converter.
■ Input Clock
The 8/10-bit A/D converter uses an output clock from the prescaler as the input clock
(operating clock).
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