Fujitsu 8FX User Manual

MB95630H Series
314 FUJITSU SEMICONDUCTOR LIMITED MN702-00009-2v0-E
CHAPTER 18 8/16-BIT PPG
18.6 Operations and Setting Procedure Example
Figure 18.6-2 Operation of 8-bit PPG Independent Mode
Example for setting the duty to 50%
When the PDS register is set to "0x02" with the PPS register set to "0x04", the PPG output is
set at a duty ratio of 50% (half the value of the PPS register is set to the PDS register).
5
4
3
2 1
5
4
3
2 1
5
4
3
2
Synchronizing with machine clock
(1)
(2)
α
Downcounter value matches
matches duty setting value
(Normal polarity)
PPGn0 Pin
(Reverse polarity)
Counter borrow
PPG output source
m=5
n=4
Stop
(1) = n
× T
(2) = m
× T
T: Count clock cycle
m: PPS register value
n: PDS register value
α: The value changes depending
on the count clock selected and
the start timing.
Count clock
(Cycle T)
PEN
(Counter start)
PPG timer n0 counter value
Duty setting
(PDS)
Cycle setting
(PPS)
Stop

Fujitsu 8FX Specifications

General

Brand	Fujitsu
Model	8FX
Category	Computer Hardware
Language	English