Fujitsu 8FX

MB95630H Series
MN702-00009-2v0-E FUJITSU SEMICONDUCTOR LIMITED 357
CHAPTER 20 16-BIT RELOAD TIMER
20.2 Configuration
● Count clock generation circuit
The count clock for the 16-bit reload timer is generated from the internal clock or TIn pin input
signal.
● Reload control circuit
This circuit controls reload operation when the timer is started or an underflow occurs.
● Output control circuit
This circuit controls the inversion of TOn pin output by an underflow of the 16-bit
downcounter and the enabling and disabling of TOn pin output.
● Operation control circuit
This circuit controls the starting and stopping of the 16-bit downcounter.
● 16-bit reload timer timer register (upper/lower) ch. n (TMRHn/TMRLn)
TMRHn and TMRLn form a 16-bit downcounter. Reading these registers returns the current
count value.
● 16-bit reload timer reload register (upper/lower) ch. n (TMRLRHn/TMRLRLn)
This register sets the load value to the 16-bit downcounter. The register loads the setting value
of the 16-bit reload timer reload register to the 16-bit downcounter to down count.
● 16-bit reload timer control status register (upper/lower) ch. n (TMCSRHn/TMCSRLn)
This register controls the count clock, operating mode, clock selection, interrupts, and other
aspects of the 16-bit reload timer as well as indicates the current operation status.
■ Input Clock
The 16-bit reload timer uses the output clock from the prescaler or the input signal from the
TIn pin as its input clock (count clock).