MB95630H Series
26 FUJITSU SEMICONDUCTOR LIMITED MN702-00009-2v0-E
CHAPTER 3 CLOCK CONTROLLER
3.2 Oscillation Stabilization Wait Time
â– Order of Priority for Oscillation Stabilization Wait Times
When multiple clocks are enabled simultaneously, the clock controller counts the respective
oscillation stabilization wait times of clocks according to a designated order of priority. Below
are the respective orders of priority for counting different oscillation stabilization wait times in
different clock modes.
• Main clock mode
Sub-CR clock > Subclock > Main CR clock > Main CR PLL clock
• Main CR clock mode
Sub-CR clock > Subclock > Main CR PLL clock > Main clock
• Main CR PLL clock mode
Sub-CR clock > Subclock > Main clock
• Subclock mode
Sub-CR clock > Main CR clock or main clock > Main CR PLL clock
• Sub-CR clock mode
Main CR clock or main clock > Subclock > Main CR PLL clock