MB95630H Series
480 FUJITSU SEMICONDUCTOR LIMITED MN702-00009-2v0-E
CHAPTER 22 UART/SIO
22.7 Registers
[bit4] RXE: Receive operation enable bit
This bit enables or disables the reception of serial data.
If this bit is set to "0" during a receive operation, the receive operation is immediately disabled and
initialized. The data received up to that point is not transferred to the UART/SIO serial input data register.
Note: Setting this bit to "0" initializes the receive operation. It has no effect on the error flags (PER, OVE,
FER, RDRF) in the SSRn register.
[bit3] TXE: Transmit operation enable bit
This bit enables or disables the transmission of serial data.
If this bit is set to "0" during a transmit operation, the transmit operation is immediately disabled and
initialized. The transmission completion flag bit (SSRn:TCPL) is then be set to "1", and the transmit data
register empty flag bit (SSRn:TDRE) is also be set to "1".
[bit2] RIE: Receive interrupt enable bit
This bit enables or disables the receive interrupt.
With this bit set to "1" (receive interrupt enabled), a receive interrupt is generated immediately after either
the receive data register full flag bit (SSRn:RDRF) or any of the receive error flag bits (SSRn:PER, OVE,
FER) is set to "1".
[bit1] T
CIE: Transmission completion interrupt enable bit
This bit enables or disables the transmission completion interrupt.
With this bit set to "1" (transmission completion interrupt enabled), a transmission completion interrupt is
generated immediately after the transmission completion flag bit (SSRn:TCPL) is set to "1".
[bit0] TEIE: Transmit data register empty interrupt enable bit
This bit enables or disables the transmit data register empty interrupt.
With this bit set to "1" (transmit data register empty interrupt enabled), a transmit data register empty
interrupt is generated immediately after the transmit data register empty flag bit (SSRn:TDRE) is set to "1".
bit4 Details
Writing "0" Disables the reception of serial data.
Writing "1" Enables the reception of serial data.
bit3 Details
Writing "0" Disables the transmission of serial data.
Writing "1" Enables the transmission of serial data.
bit2 Details
Writing "0" Disables the receive interrupt.
Writing "1" Enables the receive interrupt.
bit1 Details
Writing "0" Disables the transmission completion interrupt.
Writing "1" Enables the transmission completion interrupt.
bit0 Details
Writing "0" Disables the transmit data register empty interrupt.
Writing "1" Enables the transmit data register empty interrupt.
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