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Fujitsu 8FX User Manual

Fujitsu 8FX
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MB95630H Series
496 FUJITSU SEMICONDUCTOR LIMITED MN702-00009-2v0-E
CHAPTER 24 I
2
C BUS INTERFACE
24.2 Configuration
â–  Block Diagram of I
2
C Bus Interface
Figure 24.2-1 Block Diagram of I
2
C Bus Interface
SCC
BEIE
MSS
DACKE
GACKE
INTE
INT
BER
IBSRn
Start/stop condition
generation circuit
Clock selector 1
Clock selector 2
Clock divider 1
Clock divider 2
Shift clock
generator
Error
Sync
Start
Master
ACK enable
GC-ACK enable
Bus busy
Repeat start
Last bit
Transmit/receive
Arbitration lost detection circuit
SDAn line
SCLn line
First byte
I C bus interface enable
Start/stop condition
detection circuit
ICCRn
EN
CS2
CS1
CS0
RSC
LRB
TRX
FBT
BB
IBCR1n
Transfer interrupt
End
8
5
Machine clock
Shift clock edge
DMBP
CS4
CS3
678
224
2
AAS
GCA
Slave
IDDRn register
IAARn register
Slave address
comparison circuit
IBSRn
General
call
Stop interrupt
IBCR0n
38 98 128 256 512
INT timing select
Address ACK enable
ALF
ALE
SPF
SPE
AACKX
INTS
WUF
WUE
F
2
MC-8FX internal bus

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Fujitsu 8FX Specifications

General IconGeneral
BrandFujitsu
Model8FX
CategoryComputer Hardware
LanguageEnglish

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