Fujitsu 8FX User Manual

MB95630H Series
MN702-00009-2v0-E FUJITSU SEMICONDUCTOR LIMITED 565
CHAPTER 26 DUAL OPERATION FLASH MEMORY
26.8 Registers
[bit1] ETIEN: ERSTO interrupt enable bit
This bit enables or disables the generation of interrupt requests triggered by the failure of Flash memory
sector erase.
[bit0] ERSTO: ERSTO interrupt request flag bit
This bit indicates that Flash memory sector erase has failed.
When Flash memory sector erase fails, the ERSTO bit is set to "1" upon completion of the Flash memory
automatic algorithm. Afterward, further Flash memory programming/erasing is disabled. Writing a reset
command can make the Flash memory return to the normal command state.
An interrupt request is generated when the ERSTO bit is set to "1", provided that generating an interrupt
request upon failure of Flash memory sector erase has been enabled (FSR2:ETIEN = 1).
Writing "0" to this bit clears it.
Writing "1" to this bit has no effect on operation.
When read by the read-modify-write (RMW) type of instruction, this bit always returns "1".
bit1 Details
Writing "0" Disables the interrupt request upon failure of Flash memory sector erase (FSR2:ERSTO = 1).
Writing "1" Enables the interrupt request upon failure of Flash memory sector erase (FSR2:ERSTO = 1).
bit0 Details
Reading "0" Indicates that the device is in the command input wait state or Flash memory erase is in progress.
Reading "1" Indicates that Flash memory sector erase has failed.
Writing "0" Clears this bit.
Writing "1" Has no effect on operation.

Fujitsu 8FX Specifications

General

Brand	Fujitsu
Model	8FX
Category	Computer Hardware
Language	English