Fujitsu 8FX

MB95630H Series
MN702-00009-2v0-E FUJITSU SEMICONDUCTOR LIMITED 623
APPENDIX A Instruction Overview
A.4 F
2
MC-8FX Instructions
Note:
In automatic transfer to T during byte transfer to A, AL is transferred to TL.
If an instruction has plural operands, they are saved in the order indicated by
MNEMONIC.
■ Arithmetic Operation Instructions
Table A.4-2 Arithmetic Operation Instruction (1 / 2)
No. MNEMONIC ~ # Operation TL TH AH N Z V C OPCODE
1 ADDC A, Ri 2 1 (A) ← (A) + (Ri) + C - - - + + + + 28 to 2F
2 ADDC A, #d8 2 2 (A) ← (A) + d8 + C - - - + + + + 24
3 ADDC A, dir 3 2 (A) ← (A) + (dir) + C - - - + + + + 25
4 ADDC A, @IX + off 3 2 (A) ← (A) + ( (IX) + off) + C - - - + + + + 26
5 ADDC A, @EP 2 1 (A) ← (A) + ( (EP) ) + C - - - + + + + 27
6 ADDCW A 1 1 (A) ← (A) + (T) + C - - dH + + + + 23
7 ADDC A 1 1 (AL) ← (AL) + (TL) + C - - - + + + + 22
8SUBC A, Ri 2 1(A) ← (A) - (Ri) - C - - - + + + + 38 to 3F
9 SUBC A, #d8 2 2 (A) ← (A) - d8 - C - - - + + + + 34
10 SUBC A, dir 3 2 (A) ← (A) - (dir) - C - - - + + + + 35
11 SUBC A, @IX + off 3 2 (A) ← (A) - ( (IX) + off) - C - - - + + + + 36
12 SUBC A, @EP 2 1 (A) ← (A) - ( (EP) ) - C - - - + + + + 37
13 SUBCW A 1 1 (A) ← (T) - (A) - C - - dH + + + + 33
14 SUBC A 1 1 (AL) ← (TL) - (AL) - C - - - + + + + 32
15 INC Ri 3 1 (Ri) ← (Ri) + 1 - - - + + + - C8 to CF
16 INCW EP 1 1 (EP) ← (EP) + 1 ------- C3
17 INCW IX 1 1 (IX) ← (IX) + 1 ------- C2
18 INCW A 1 1 (A) ← (A) + 1 - - dH + + - - C0
19 DEC Ri 3 1 (Ri) ← (Ri) - 1 - - - + + + - D8 to DF
20 DECW EP 1 1 (EP) ← (EP) - 1 ------- D3
21 DECW IX 1 1 (IX) ← (IX) - 1 ------- D2
22 DECW A 1 1 (A) ← (A) - 1 - - dH + + - - D0
23 MULU A 8 1 (A) ← (AL) × (TL) --dH---- 01
24 DIVU A 17 1 (A) ← (T) / (A) , MOD→ (T) dL dH dH - + - - 11
25 ANDW A 1 1 (A) ← (A) (T) - - dH + + R - 63
26 ORW A 1 1 (A) ← (A) (T) - - dH + + R - 73
27 XORW A 1 1 (A) ← (A) (T) - - dH + + R - 53
28 CMP A 1 1 (TL) - (AL) - - - + + + + 12
29 CMPW A 1 1 (T) - (A) - - - + + + + 13
30RORCA 11 ---+ + -+ 03
31ROLCA 11 ---+ + -+ 02
32 CMP A, #d8 2 2 (A) - d8 - - - + + + + 14
33 CMP A, dir 3 2 (A) - (dir) - - - + + + + 15
34 CMP A, @EP 2 1 (A) - ( (EP) ) - - - + + + + 17
35 CMP A, @IX + off 3 2 (A) - ( (IX) + off) - - - + + + + 16
36 CMP A, Ri 2 1 (A) - (Ri) - - - + + + + 18 to 1F
37 DAA 1 1 decimal adjust for addition - - - + + + + 84
38 DAS 1 1 decimal adjust for subtraction - - - + + + + 94
39 XOR A 1 1 (A) ← (AL) (TL) - - - + + R - 52
40 XOR A, #d8 2 2 (A) ← (AL) d8 - - - + + R - 54
41 XOR A, dir 3 2 (A) ← (AL) (dir) - - - + + R - 55
42 XOR A, @EP 2 1 (A) ← (AL) ( (EP) ) - - - + + R - 57
4
3 XOR A, @IX + off 3 2 (A) ← (AL) ( (IX) + off) - - - + + R - 56
44 XOR A, Ri 2 1 (A) ← (AL) (Ri) - - - + + R - 58 to 5F
45 AND A 1 1 (A) ← (AL) (TL) - - - + + R - 62
C→ A
C← A