Honeywell Series A - Page 357

8. Maintenance, Checkout, and Calibration
8.10. FIM Self-Test Diagnostic Codes
R400 Experion PKS Series A Fieldbus Interface Module User's Guide 357
July 2010 Honeywell
Test Code Target Device(s) Failure Modes Function
detected on each byte lane of the
upper RAM segment.
T125
Lower RAM Access
Test
FPGA, CPU, RAM
Verifies that lower RAM segment
can be accessed as 16-bit values.
Verifies that RAM can be written as
8-bit values and read as 16-bit
values and vice versa. Verifies that
aligned and misaligned halfwords
and words can be written and read.
T126
Upper RAM Access
Test
FPGA, CPU, RAM
Verifies that upper RAM segment
can be accessed as 16-bit values.
Verifies that RAM can be written as
8-bit values and read as 16-bit
values and vice versa. Verifies that
aligned and misaligned halfwords
and words can be written and
read.FIFOs exceed a specified
limit.
T127
RAM Unique
Address Test
FPGA, CPU, RAM
Verifies that each address can be
accessed uniquely. Runs with data
parity enabled and fatal.
T128
RAM Destructive
Pattern Test
FPGA, CPU, RAM
Checks address and data lines by
writing a non-repeating pattern over
the whole memory (upper and
lower segments), then verifying it.
Runs with data parity enabled and
fatal. Multiple patterns are used for
better coverage.
Pre-OS Diagnostics
T150
Application Image
Validation
Missing
Application Image,
Incomplete load of
Application Image,
Bad flash memory
Checks for valid Application Image
stored in flash memory.
T255
End of POST
Diagnostics
Confirms that self test is
successful and there is a valid
Application Image stored in Flash.