HP 1660 Series User Manual

cc Adjust the pulse generator channel 1 Delay, then select Precision Edge Find in the
oscilloscope Delta T menu. Repeat this step until the pulses are aligned according to
the setup time of the setup/hold combination selected, +0.0 ps or − 100 ps.
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Select the clocks to be tested.
aa Select the clock field to be tested and then select the clock edges as indicated in the
table. The first time through this test, use the top clocks and edges.
Clocks
J↑ + M↓ + N↑
K↑ + L↓ + P↑
bb Connect the rising edge clocks to the pulse generator channel 2 output, and connect
the falling edge clocks to the channel 2
output.
cc Select Done to exit the Master Clock menu.
To test the multiple-clock, multiple-edge, state acquisition (logic analyzer)
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HP 1660 Series Specifications

General

Category	Logic Analyzer
Glitch Trigger	Yes
Pattern Trigger	Yes
State Analysis	Yes
Transitional Timing	Yes
Trigger Modes	Edge, Pattern, Glitch