HP 1660 Series User Manual

99 Using the Delay mode of the pulse generator channel 1, position the pulses according
to the setup time of the setup/hold combination selected, +0.0 ps or − 100 ps.
aa In the oscilloscope Delta V menu, set the Marker 1 Position to Chan 1, then set
Marker 1 at − 1.3000 V. Set the Marker 2 Position to Chan 2, then set Marker 2 at
− 1.3000 V.
bb In the oscilloscope Delta T menu, select Start On Pos Edge 1. Select Stop on Neg
Edge 1.
cc Adjust the pulse generator channel 1 Delay, then select Precision Edge Find in the
oscilloscope Delta T menu. Repeat this step until the pulses are aligned according to
the setup time of the setup/hold combination selected, +0.0 ps or − 100 ps.
1010
Select the clocks to be tested.
aa Select the clock field to be tested, then select the clock edges as indicated in the
table. The first time through this test, use the top clocks and edges.
Clocks
J↓ + M↑ + N↓
K↓ + L↑ + P↓
bb Select Done to exit the Master Clock menu.
To test the multiple-clock, multiple-edge, state acquisition (logic analyzer)
3–45

HP 1660 Series Specifications

General

Category	Logic Analyzer
Glitch Trigger	Yes
Pattern Trigger	Yes
State Analysis	Yes
Transitional Timing	Yes
Trigger Modes	Edge, Pattern, Glitch