Intel P4304XXMFEN2 User Manual

Intel
®
Server Chassis P4304XXMFEN2/P4304XXMUXX Product Family System Integration and Service Guide
147
Table 6. MRC Progress Codes
Should a major memory initialization error occur, preventing the system from booting with data integrity, a
beep code is generated, the MRC displays a fatal error code on the diagnostic LEDs, and a system halt
command is executed. Fatal MRC error halts do NOT change the state of the System Status LED, and they do
NOT get logged as SEL events. The following table lists all MRC fatal errors that are displayed to the diagnostic
LEDs.
Note: Fatal MRC errors will display POST error codes that may be the same as BIOS POST progress codes
displayed later in the POST process. You can distinguish the fatal MRC codes from the BIOS POST progress
codes by the 3 long beeps accompanying the memory failure beep code of identified in
Table 8.
Checkpoi
nt
Diagnostic LED Decoder
Description
1 = LED On, 0 = LED Off
Upper Nibble
Lower Nibble
M
S
B
L
S
B
8
h
4
h
2
h
1
h
8
h
4
h
2
h
1
h
LED
#
7
#
6
#
5
#
4
#
3
#
2
#
1
#
0
MRC Progress Codes
B0h
1
0
1
1
0
0
0
0
Detect DIMM Population
B1h
1
0
1
1
0
0
0
1
Set DDR3 Frequency
B2h
1
0
1
1
0
0
1
0
Gather Remaining SPD Data
B3h
1
0
1
1
0
0
1
1
Program Registers on the Memory Controller Level
B4h
1
0
1
1
0
1
0
0
Evaluate RAS Modes and Save Rank Information
B5h
1
0
1
1
0
1
0
1
Program Registers on the Channel Level
B6h
1
0
1
1
0
1
1
0
Perform the JEDEC-defined Initialization Sequence
B7h
1
0
1
1
0
1
1
1
Train DDR3 Ranks
B8h
1
0
1
1
1
0
0
0
Initialize CLTT/OLTT
B9h
1
0
1
1
1
0
0
1
Hardware Memory Test and initialization
BAh
1
0
1
1
1
0
1
0
Execute software memory initialization
BBh
1
0
1
1
1
0
1
1
Program Memory Map and Interleaving
BCh
1
0
1
1
1
1
0
0
Program RAS Configuration
BFh
1
0
1
1
1
1
1
1
MRC is Done

Intel P4304XXMFEN2 Specifications

General

Brand	Intel
Model	P4304XXMFEN2
Category	Chassis
Language	English