Intel P4304XXMFEN2 User Manual

Intel
®
Server Chassis P4304XXMFEN2/P4304XXMUXX Product Family System Integration and Service Guide
149
BIOS POST Progress Codes
The following table provides a list of all POST progress codes.
Table 8. POST Progress Codes
Checkpoint
Diagnostic LED Decoder
Description
1 = LED On, 0 = LED Off
Upper Nibble
Lower Nibble
MSB
LSB
8h
4h
2h
1h
8h
4h
2h
1h
LED #
#7
#6
#5
#4
#3
#2
#1
#0
SEC Phase
01h
0
0
0
0
0
0
0
1
First POST code after CPU reset.
02h
0
0
0
0
0
0
1
0
Microcode load begin.
03h
0
0
0
0
0
0
1
1
CRAM initialization begin.
04h
0
0
0
0
0
1
0
0
PEI Cache When Disabled.
05h
0
0
0
0
0
1
0
1
SEC Core At Power On Begin.
06h
0
0
0
0
0
1
1
0
Early CPU initialization during Sec Phase.
07h
0
0
0
0
0
1
1
1
Early SB initialization during Sec Phase.
08h
0
0
0
0
1
0
0
0
Early NB initialization during Sec Phase.
09h
0
0
0
0
1
0
0
1
End Of Sec Phase.
0Eh
0
0
0
0
1
1
1
0
Microcode Not Found.
0Fh
0
0
0
0
1
1
1
1
Microcode Not Loaded.
PEI Phase
10h
0
0
0
1
0
0
0
0
PEI Core
11h
0
0
0
1
0
0
0
1
CPU PEIM
15h
0
0
0
1
0
1
0
1
NB PEIM
19h
0
0
0
1
1
0
0
1
SB PEIM
MRC Process Codes – MRC Progress Code Sequence is executed – See Table 7. MRC Progress Codes
PEI Phase continued…
31h
0
0
1
1
0
0
0
1
Memory Installed
32h
0
0
1
1
0
0
1
0
CPU PEIM (CPU Init)
33h
0
0
1
1
0
0
1
1
CPU PEIM (Cache Init)
34h
0
0
1
1
0
1
0
0
CPU PEIM (BSP Select)
35h
0
0
1
1
0
1
0
1
CPU PEIM (AP Init)
36h
0
0
1
1
0
1
1
0
CPU PEIM (CPU SMM Init)
4Fh
0
1
0
0
1
1
1
1
DXE IPL started
DXE Phase
60h
0
1
1
0
0
0
0
0
DXE Core started

Intel P4304XXMFEN2 Specifications

General

Brand	Intel
Model	P4304XXMFEN2
Category	Chassis
Language	English