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LSIS LSLV-S100 - Dynamic Braking (DB) Resistor Configuration

LSIS LSLV-S100
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218
Learning Protection Features
6.2.5 Dynamic Braking (DB) Resistor Configuration
For S100 series, the braking resistor circuit is integrated inside the inverter.
Group
Code
Name
LCD Display
Parameter Setting
Setting range
Unit
Pr
66
Braking resistor
configuration
DB Warn %ED
10
0-30
%
OU
31
Multi-function relay 1
item
Relay 1
31
DB Warn %ED
-
-
33
Multi-function
output 1 item
Q1 Define
Dynamic Breaking Resistor Setting Details
Code
Description
Pr.66 DB Warn %ED
Set braking resistor configuration (%ED: Duty cycle). Braking resistor
configuration sets the rate at which the braking resistor operates for one
operation cycle. The maximum time for continuous braking is 15 sec and the
braking resistor signal is not output from the inverter after the 15 sec period has
expired. An example of braking resistor set up is as follows:
% =
_
_ + _ + _ + _
× 100%
[Example 1]
% =
_
_ + _1 + _ + _2
× 100%

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