Clock Synthesis
R&S
®
SMA100B
279User Manual 1178.3834.02 ─ 05
3. Observe the information on the home screen, "Clk Syn/Power Sens" tile.
The "Clk Syn/Power Sens" tile indicates that clock synthesis is activated and gives
an overview of the key parameters.
Settings
State ...........................................................................................................................279
Output Type.................................................................................................................279
Frequency .................................................................................................................. 280
Level ...........................................................................................................................280
DC Offset State ..........................................................................................................280
DC Offset ....................................................................................................................281
Voltage........................................................................................................................ 281
Delta Phase.................................................................................................................281
Reset Delta Phase Display......................................................................................... 281
User Variation..............................................................................................................281
└ Variation Active............................................................................................. 281
└ Variation Step................................................................................................281
State
Activates/deactivates generation of a system clock.
The signal is output at the [Clk Syn] connector.
Remote command:
:CSYNthesis:STATe on page 426
Output Type
Defines the shape of the generated clock signal.