YASKAWA SVC - I;O Registers

6.6 Slave CPU Synchronization
6.6.4 I/O Registers
6-24
6.6.4 I/O Registers
This section gives the configurations of the I/O registers on the master and slave.
Master I/O Register Configuration
The first addresses and sizes of the I/O register areas are set on the Link Assignment Tab Page in
the MECHATROLINK Communications Definition Dialog Box.
Refer to the following section for details on register areas.
11.3 MECHATROLINK-III I/O Module Settings on page 11-13
Output Registers Input Registers
7 6 5 3 2 1 0 7 6 5 3 2 1 0
OW I/O Command IW I/O Command Response
Reserved for system. Master Status
OW+1
Command Control
IW+1
Command Status
OW+2 Output Data 1 Low IW+2 Input Data 1 Low
High High
OW+3 Output Data 2 Low IW+3 Input Data 2 Low
High High
OW+4 Output Data 3 Low IW+4 Input Data 3 Low
High High
OW+5 Output Data 4 Low IW+5 Input Data 4 Low
High High
OW+6 Output Data 5 Low IW+6 Input Data 5 Low
High High
OW+7 Output Data 6 Low IW+7 Input Data 6 Low
High High
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Important
Information