15. USART 0/1 A96G166/A96A166/A96S166 User’s manual
UnBAUD (USART Baud-Rate Generation Register) FCH/F5H
The value in this register is used to generate internal baud rate in
asynchronous mode or to generate XCK clock in synchronous or
SPI mode. To prevent malfunction, do not write ‘0’ in asynchronous
mode, and do not write ‘0’ or ‘1’ in synchronous or SPI mode.
UnDATA (USART Data Register) FDH/F6H
The USART Transmit Buffer and Receive Buffer share the same
I/O address with this DATA register. The Transmit Data Buffer is
the destination for data written to the UDATA register. Reading the
UDATA register returns the contents of the Receive Buffer.
Write this register only when the UDRE flag is set. In SPI or
synchronous master mode, write this register even if TX is not
enabled to generate clock, XCK.
FPCRn (USART Floating Point Register) 101AH/101DH
USART Floating Point Counter
8-bit floating point counter
NOTE: BAUD RATE compensation can be used in the following ways:
Example1
 Condition : sysclk = 16MHz, Baud rate = 9600 bps, Asynchronous Normal Mode (U2X = 0)
 Baud rate = sysclk / 16 x (UBAUD + 1)
 Calculated UBAUD = (1000000 / Target Baud rate) – 1 = 103.17, Error rate = 0.17 ⇒ UBAUD = 104
 UCTRL4 = 0x04, Enable baud rate Compensation
 Calculated FPCR = (UBAUD - Calculated UBAUD) x 256 = (104 – 103.17) x 256 = 212.48 ⇒ FPCR =
213
Example2
 Condition : sysclk = 16MHz, Baud rate = 115,200 bps, Asynchronous Normal Mode (U2X = 0)
 Baud rate = sysclk / 16 x (UBAUD + 1)
 Calculated UBAUD = (1000000 / Target Baud rate) – 1 = 7.68, Error rate = 0.68 ⇒ UBAUD = 8
 UCTRL4 = 0x04, Enable baud rate Compensation
 Calculated FPCR = (UBAUD - Calculated UBAUD) x 256 = (8 – 7.68) x 256 = 81.92 ⇒ FPCR = 82